Debugging the core monitoring switch

Core monitoring can be achieved using monitor mode debugging, trace logging, and hardware/software co-debugging to observe CPU behavior without halting critical peripherals.

Monitor Mode Debugging

For ARM Cortex-M MCUs, monitor mode debugging allows you to debug the core without stopping time-critical operations. Unlike halt-mode debugging, which freezes the entire CPU, monitor mode triggers a DebugMonitor exception when a breakpoint or debug event occurs. The CPU executes a high-priority interrupt handler that communicates with the debugger while keeping critical peripherals, such as PWM or motor-control loops, running uninterrupted . This is particularly useful in production or real-time systems where halting the core could cause hardware faults or unsafe conditions. To enable monitor mode:

• Ensure halting debug is disabled by clearing the C_DEBUGEN bit in the core debug registers .
• Configure the DebugMonitor exception handler to service debug events, memory reads/writes, and step/run commands.
• Assign the handler a priority that allows it to run above background tasks but below critical ISRs to maintain system stability . Supported Cortex-M variants include M3, M4, M7, M23, M33, M55, and M85. Cortex-M0 and M0+ do not support monitor mode and require halt-mode debugging .

Trace-Based Core Monitoring

For more detailed runtime analysis, core monitors can generate trace files capturing program counters, instructions, memory accesses, and register data along with timestamps . These trace files can be post-processed using tools like Indago to visualize CPU behavior and identify software or hardware issues. Trace-based monitoring is non-intrusive and preserves the timing behavior of the system, making it ideal for performance optimization and debugging in complex SoCs .

Hardware/Software Co-Debugging

A core monitor can integrate both hardware and software debugging by providing a unified environment for observing CPU execution and peripheral interactions. This approach is essential for multicore SoCs with hierarchical networks and multiple processing engines. Co-debugging reduces development time by allowing simultaneous inspection of software execution and hardware state, improving verification and fault diagnosis .

Practical Recommendations

• Use monitor mode for real-time systems where halting the CPU is unsafe.
• Employ trace logging for post-mortem analysis or performance profiling.
• Combine hardware/software co-debugging for complex SoCs to capture both CPU and peripheral behavior.
• Verify that your MCU supports the required debug features and configure the debug registers appropriately before deploying monitor mode. By combining these techniques, you can effectively debug the core monitoring switch while maintaining system stability and observing runtime behavior.